firmware: zero-copy JPEG → BGR888 → DSI hot path; Scrypted pre-rotates

Architectural rework of the /frame hot path. Scrypted now ships every
JPEG already scaled + rotated to the panel's native dimensions (read
from the firmware's /state response so nothing is hardcoded on the
Scrypted side); the firmware decodes the JPEG straight into a BGR888
buffer that's directly draw_bitmap'able by the DSI driver, with zero
CPU pixel work and zero rotation work in between.

Firmware
- jpeg_decoder now uses JPEG_DECODE_OUT_FORMAT_RGB888 +
  JPEG_DEC_RGB_ELEMENT_ORDER_BGR. Output buffer sized for 800*480*3.
- New display_present_bgr888() is a one-liner that hands the decoder's
  output straight to esp_lcd_panel_draw_bitmap.
- /frame handler validates dimensions against the panel-native
  VIEWPORT_PANEL_WIDTH x VIEWPORT_PANEL_HEIGHT (was effective_dims
  branching on orientation). Returns 400 if it's anything else.
- /state JSON adds panel_width + panel_height so Scrypted can read them
  without hardcoding board-specific knowledge.
- display_present_rgb565 + s_rot_buf stay for the local-screens cold
  path (info screen, loading) which still does its own CPU conversion +
  rotation — infrequent enough that it's not worth the rewrite.

Scrypted
- startStream() GETs /state at stream-start time, caches panel_width
  and panel_height in viewport storage, and uses them as the ffmpeg
  scale target. Falls back to cached or 800x480 if /state is mid-reboot.
- For portrait viewports the ffmpeg pipeline now does
  scale=H:W:flags=lanczos,transpose=1 so the JPEG arrives pre-rotated
  90° CW into panel-native dimensions. Landscape is just scale=W:H.
- No more in-firmware rotation; Scrypted is the single source of truth
  for "how do I get this camera frame into a panel-shaped JPEG".

Expected ceiling lift: ~5 fps → ~10 fps, gated by the JPEG decoder
hardware throughput instead of the CPU rgb565→bgr888 + rotation loop.

1 files changed, 9 insertions, 7 deletions

diff --git a/main/jpeg_decoder.c b/main/jpeg_decoder.c
index f2a7d92..2538f69 100644
--- a/main/jpeg_decoder.c
+++ b/main/jpeg_decoder.c
@@ -62,18 +62,20 @@ void jpeg_decoder_unlock(void)
 void *jpeg_decoder_input_buffer(void) { return s_in_buf; }
 
 esp_err_t jpeg_decoder_decode(size_t   jpeg_len,
-                              void   **out_rgb565,
+                              void   **out_bgr888,
                               uint16_t *out_width,
                               uint16_t *out_height)
 {
     if (jpeg_len == 0 || jpeg_len > s_in_cap) return ESP_ERR_INVALID_SIZE;
 
+    // Hardware decode directly into a panel-native BGR888 buffer.
+    // _BGR rgb_order swaps the channel layout so memory ends up as
+    // [B, G, R] per pixel — exactly what the ESP32-P4 DSI engine +
+    // TC358762 + Pi panel pipeline wants. Total firmware-side cost in
+    // the hot /frame path: this hardware decode + one DMA hand-off to
+    // the panel. No CPU pixel work.
     jpeg_decode_cfg_t dec_cfg = {
-        .output_format = JPEG_DECODE_OUT_FORMAT_RGB565,
-        // Empirically: _RGB emits the RGB565 word in big-endian byte order
-        // (red 0xF800 → bytes f8 00) which our LE uint16 painter reads
-        // swapped. _BGR emits little-endian to match (despite the
-        // misleading "BGR" name) — verified by the decode-byte dump.
+        .output_format = JPEG_DECODE_OUT_FORMAT_RGB888,
         .rgb_order     = JPEG_DEC_RGB_ELEMENT_ORDER_BGR,
         .conv_std      = JPEG_YUV_RGB_CONV_STD_BT601,
     };
@@ -94,7 +96,7 @@ esp_err_t jpeg_decoder_decode(size_t   jpeg_len,
         return err;
     }
 
-    *out_rgb565 = s_out_buf;
+    *out_bgr888 = s_out_buf;
     *out_width  = info.width;
     *out_height = info.height;
     return ESP_OK;